Jump to content United States-English
HP.com Home Products and Services Support and Drivers Solutions How to Buy
» Contact HP
HP.com home
Education & Training  >  Find a course 

HP OpenVMS Internals I

» 

Education & Training
US & Canada

» Contact Us
» Register for a class
» Education Centers
» HP RAIL
» Onsite & Dedicated Training
» What's new
» Find a course
» Big Data
» Business Analysis & Project Management
» Cloud
» Data Center
» HP ExpertOne Customer
» HP ExpertOne Partner
» HP Integrity
» Graphic Solutions
» ITSM / ITIL
» Linux
» Microsoft
» HP Networking
» HP NonStop
» HP OpenVMS
» HP Project Odyssey
» HP ProLiant
HP BladeSystem
» Security
» HP Storage
» HP Tru64
» HP-UX
» Virtualization
» HP VISPEL-Video Training
» VMware
» HP Education Consulting
» Certification
» HP Virtual Rooms
» eLearning
» HP Software Education
Content starts here
At a glance
View schedule & enroll Sorted by: location or date
Course number U3719S
Length 5 days
Delivery method Instructor-led training ( ILT)
Onsite dedicated training ( OST)
Price USD $3,500
CAD $4,200

Course overview

This course is designed to examine the components, structures and mechanisms of the OpenVMS Alpha operating system. It is intended for those students requiring an extensive understanding of these areas. This part of the course lays the foundations for understanding the mechanisms that will be used throughout the rest of the internals offerings at a programming level. the course will use the System Dump Analyzer to illustrate the concepts presented in the course materials. The majoity of the code will be written in DEC C and will be current as OpenVMS Version 8.3.


Prerequisites

  • Completion of the Programming with system services courses
  • The ability to read VAX macro
  • Ability to program in DEC C

Audience

  • HP OpenVMS system programmers

Ways to save

Benefits to you

This course features the foundations for understanding the mechanisms that will be used throughout the rest of the internals offerings. Students will learn the mechanisms that support the system and how to interact with them at a programming level.


Next Steps

  • HP OpenVMS Internals II (U3720S)

Course outline

Internals concepts

  • Data Structures
  • Data Structure
  • Fields Linked
  • Lists Stacks
  • Asynchronous Events and Context
  • Synchronization
  • OpenVMS Symbolic Naming Conventions

General Alpha architecture

  • CISC vs. RISC Architectures
  • Computer Architectures
  • Alpha RISC Architecture Overview
  • Privileged Architecture Library
  • VAX vs. Alpha Architecture

Data formats and general instructions

  • Data Representation
  • Floating Point Data Representation
  • Instruction Formats
  • Data Alignment Issues

HP OpenVMS calling standard

  • Alpha Calling Standard
  • Descriptors
  • Alpha Calling Standard Mechanics
  • Procedure Descriptors Variable-Size Stack Frame
  • Alpha Calling Standard

HP OpenVMS PAL code

  • General Non-Privileged PALcode
  • OpenVMS Queues
  • OpenVMS Internal Processor Regis

Synchronization: Alpha architectural issues

  • Atomicity
  • Unintentionally Shared Data
  • Read/write Ordering

Introduction to SDA

  • Debugging Tools Available
  • SDA Requirements and Uses
  • Command Summary
  • Commonly Used SDA SHOW Options
  • Symbols and Operators
  • CLUE

The process

  • Process concepts
  • The Process and Kernel Threads
  • Process Data Structures Overview
  • Job Information Block (JIB)
  • Kernel Threads
  • PCB Vector Table
  • Virtual Address Spa

Interrupts and exceptions

  • Interrupts and Exceptions
  • Processor Status Register
  • SCB
  • OpenVMS Access Modes
  • Change Mode Instructions
  • System Service Dispatching

Programming and system context synchronization

  • The Change Mode System Services
  • Using IPL for Synchronization
  • Symmetric Multiprocessing Systems
  • Spinlock Acquire Timeouts
  • Mutual Exception Semaphores (Mutexes)
  • Mutex Tracing
  • Dynamic Memory Mechanisms
  • v7.3 (v7.2-1H1) Pool Reclamation Change Review

Process context synchronization

  • AST Concepts
  • Timer Queue Entries
  • Timer Queue Entry Changes
  • Distributed Locking Mechanism
  • Dynamic Resource Remastering
  • Pre-v8.3 Dydnamic Resource Remastering
  • v8.3 Lock Manager Changes
  • Pre v7.3 Remastering Method
  • Deadlock Detection in a Cluster
  • Sub-Second Deadlock Wait
  • Lock Review
  • Monitoring Lock Activity
  • Resolving Lock Resource Contention
  • Dedicated CPU Lock Manager
  • Dedicated CPU Lock Manager Interaction

Big picture review

  • Calling Standard
  • Process Structures
  • Locating Structures
  • Kernel Threads
  • System Mechanisms
  • AST Delivery
  • Synchronization
  • Nonpaged Pod Summary


u3719s c.00
Printable version
Privacy statement Using this site means you accept its terms Feedback to Education & Training
© 2014 Hewlett-Packard Development Company, L.P.